Perform Floorplanning, Placement, CTS, Routing, and Physical Implementation
Execute Static Timing Analysis (STA) and timing closure
Handle Physical Verification (DRC/LVS/ERC) and signoff checks
Analyze and fix crosstalk, noise, and signal integrity issues
Work on timing ECOs, hold/setup fixes, and congestion optimization
Collaborate with Design, DFT, and Signoff teams
Support tapeout readiness and signoff activities
Notice Period: 0 - 60 Days
SOC Design Verification Engineer
4 - 8 Years
Hyderabad / Bengaluru
π Weβre Hiring: SoC Verification Engineer (4+ Years Experience)
Develop and maintain UVM/OVM-based testbenches
Write SystemVerilog test cases, sequences, and assertions
Perform IP, Subsystem, and SoC level verification
Execute regression runs and debug failures
Analyze and drive functional & code coverage closure
Debug issues using tools like Verdi / Questa / Xcelium
Collaborate with Design, Architecture, and Validation teams
Notice Period: 0 -60 Days
DFT Engineer
4 - 8 Years
Hyderabad / Bengaluru
π Weβre Hiring: DFT Engineer (4 - 8 Years Experience)